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GH-113464: Generate a more efficient JIT #118512

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Merged
brandtbucher merged 18 commits into from
May 3, 2024
Merged

GH-113464: Generate a more efficient JIT #118512

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2901caf
Replace stencils with dedicated writer functions
brandtbucher Apr 19, 2024
f30fa64
Generate patching logic
brandtbucher Apr 19, 2024
23e211c
Cleanup
brandtbucher Apr 19, 2024
431fbed
uint64_t -> uintptr_t
brandtbucher Apr 19, 2024
3e6b25c
uintptr_t -> uint64_t
brandtbucher Apr 20, 2024
82030c8
Linting
brandtbucher Apr 20, 2024
236af82
Restore AArch64 pair folding
brandtbucher Apr 28, 2024
3b7e693
Cleanup
brandtbucher Apr 29, 2024
fbb97fc
Add missing relocations
brandtbucher Apr 29, 2024
c40bb34
Fix AArch64 folds
brandtbucher Apr 30, 2024
bd570b5
Dedent
brandtbucher May 1, 2024
b2fd9d2
Use a single array of structs
brandtbucher May 1, 2024
7aa12a2
Move C initializer formation to StencilGroup
brandtbucher May 1, 2024
9ec64ac
Add comment on why data is first
brandtbucher May 1, 2024
eb0826f
Silence warnings
brandtbucher May 2, 2024
a04d7f8
Add missing space
brandtbucher May 2, 2024
b919fcc
Clarify which patch functions are relaxing (and what that means)
brandtbucher May 3, 2024
46adf09
Exaplain why GOT is commented out
brandtbucher May 3, 2024
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uintptr_t -> uint64_t
  • Loading branch information
@brandtbucher
brandtbucher committed May 1, 2024
commit 3e6b25c3da42c8a1edfd9f49669827953daff52b
32 changes: 16 additions & 16 deletions Python/jit.c
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Original file line number Diff line number Diff line change
Expand Up @@ -116,15 +116,15 @@ mark_executable(unsigned char *memory, size_t size)

// value[value_start : value_start + len]
static uint32_t
get_bits(uintptr_t value, uint8_t value_start, uint8_t width)
get_bits(uint64_t value, uint8_t value_start, uint8_t width)
{
assert(width <= 32);
return (value >> value_start) & ((1ULL << width) - 1);
}

// *loc[loc_start : loc_start + width] = value[value_start : value_start + width]
static void
set_bits(uint32_t *loc, uint8_t loc_start, uintptr_t value, uint8_t value_start,
set_bits(uint32_t *loc, uint8_t loc_start, uint64_t value, uint8_t value_start,
uint8_t width)
{
assert(loc_start + width <= 32);
Expand Down Expand Up @@ -166,7 +166,7 @@ set_bits(uint32_t *loc, uint8_t loc_start, uintptr_t value, uint8_t value_start,

// 32-bit absolute address.
static inline void
patch_32(unsigned char *location, uintptr_t value)
patch_32(unsigned char *location, uint64_t value)
{
uint32_t *loc32 = (uint32_t *)location;
// Check that we're not out of range of 32 unsigned bits:
Expand All @@ -176,7 +176,7 @@ patch_32(unsigned char *location, uintptr_t value)

// 32-bit relative address.
static inline void
patch_32r(unsigned char *location, uintptr_t value)
patch_32r(unsigned char *location, uint64_t value)
{
uint32_t *loc32 = (uint32_t *)location;
value -= (uintptr_t)location;
Expand All @@ -188,7 +188,7 @@ patch_32r(unsigned char *location, uintptr_t value)

// 64-bit absolute address.
static inline void
patch_64(unsigned char *location, uintptr_t value)
patch_64(unsigned char *location, uint64_t value)
{
uint64_t *loc64 = (uint64_t *)location;
*loc64 = value;
Expand All @@ -197,7 +197,7 @@ patch_64(unsigned char *location, uintptr_t value)
// 12-bit low part of an absolute address. Pairs nicely with patch_aarch64_21r
// (below).
static inline void
patch_aarch64_12(unsigned char *location, uintptr_t value)
patch_aarch64_12(unsigned char *location, uint64_t value)
{
uint32_t *loc32 = (uint32_t *)location;
assert(IS_AARCH64_LDR_OR_STR(*loc32) || IS_AARCH64_ADD_OR_SUB(*loc32));
Expand All @@ -216,7 +216,7 @@ patch_aarch64_12(unsigned char *location, uintptr_t value)

// 16-bit low part of an absolute address.
static inline void
patch_aarch64_16a(unsigned char *location, uintptr_t value)
patch_aarch64_16a(unsigned char *location, uint64_t value)
{
uint32_t *loc32 = (uint32_t *)location;
assert(IS_AARCH64_MOV(*loc32));
Expand All @@ -227,7 +227,7 @@ patch_aarch64_16a(unsigned char *location, uintptr_t value)

// 16-bit middle-low part of an absolute address.
static inline void
patch_aarch64_16b(unsigned char *location, uintptr_t value)
patch_aarch64_16b(unsigned char *location, uint64_t value)
{
uint32_t *loc32 = (uint32_t *)location;
assert(IS_AARCH64_MOV(*loc32));
Expand All @@ -238,7 +238,7 @@ patch_aarch64_16b(unsigned char *location, uintptr_t value)

// 16-bit middle-high part of an absolute address.
static inline void
patch_aarch64_16c(unsigned char *location, uintptr_t value)
patch_aarch64_16c(unsigned char *location, uint64_t value)
{
uint32_t *loc32 = (uint32_t *)location;
assert(IS_AARCH64_MOV(*loc32));
Expand All @@ -249,7 +249,7 @@ patch_aarch64_16c(unsigned char *location, uintptr_t value)

// 16-bit high part of an absolute address.
static inline void
patch_aarch64_16d(unsigned char *location, uintptr_t value)
patch_aarch64_16d(unsigned char *location, uint64_t value)
{
uint32_t *loc32 = (uint32_t *)location;
assert(IS_AARCH64_MOV(*loc32));
Expand All @@ -261,7 +261,7 @@ patch_aarch64_16d(unsigned char *location, uintptr_t value)
// 21-bit count of pages between this page and an absolute address's page... I
// know, I know, it's weird. Pairs nicely with patch_aarch64_12 (above).
static inline void
patch_aarch64_21r(unsigned char *location, uintptr_t value)
patch_aarch64_21r(unsigned char *location, uint64_t value)
{
uint32_t *loc32 = (uint32_t *)location;
value = (value >> 12) - ((uintptr_t)location >> 12);
Expand All @@ -275,7 +275,7 @@ patch_aarch64_21r(unsigned char *location, uintptr_t value)
}

static inline void
patch_aarch64_21rx(unsigned char *location, uintptr_t value)
patch_aarch64_21rx(unsigned char *location, uint64_t value)
Comment thread
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{
uint32_t *loc32 = (uint32_t *)location;
assert(IS_AARCH64_ADRP(*loc32));
Expand All @@ -295,7 +295,7 @@ patch_aarch64_21rx(unsigned char *location, uintptr_t value)
// // There should be only one register involved:
// assert(reg == get_bits(loc32[1], 0, 5)); // ldr's output register.
// assert(reg == get_bits(loc32[1], 5, 5)); // ldr's input register.
// uintptr_t relaxed = *(uintptr_t *)value;
// uint64_t relaxed = *(uint64_t *)value;
// if (relaxed < (1UL << 16)) {
// // adrp reg, AAA; ldr reg, [reg + BBB] -> movz reg, XXX; nop
// loc32[0] = 0xD2800000 | (get_bits(relaxed, 0, 16) << 5) | reg;
Expand Down Expand Up @@ -327,7 +327,7 @@ patch_aarch64_21rx(unsigned char *location, uintptr_t value)

// 28-bit relative branch.
static inline void
patch_aarch64_26r(unsigned char *location, uintptr_t value)
patch_aarch64_26r(unsigned char *location, uint64_t value)
{
uint32_t *loc32 = (uint32_t *)location;
assert(IS_AARCH64_BRANCH(*loc32));
Expand All @@ -342,11 +342,11 @@ patch_aarch64_26r(unsigned char *location, uintptr_t value)

// 32-bit relative address.
static inline void
patch_x86_64_32rx(unsigned char *location, uintptr_t value)
patch_x86_64_32rx(unsigned char *location, uint64_t value)
{
uint8_t *loc8 = (uint8_t *)location;
// Try to relax the GOT load into an immediate value:
uintptr_t relaxed = *(uintptr_t *)(value + 4) - 4;
uint64_t relaxed = *(uint64_t *)(value + 4) - 4;
if ((int64_t)relaxed - (int64_t)location >= -(1LL << 31) &&
(int64_t)relaxed - (int64_t)location + 1 < (1LL << 31))
{
Expand Down